The Active-HDL suite is a comprehensive and totally integrated environment for digital IC design and verification that employs hardware description ......
Hello all, I'm evaluating ModelSim versus Active-HDL to determine which one is better in today's marketplace (for VHDL). I found some older threads....
Aldec, Inc., a pioneer in mixed-language simulation and advanced design tools for ASIC and FPGA devices, announced the release of ......
Aldec, Inc. released Active-HDL 7.3 today. The 7.3 release includes multi-threaded HDL compilation, new waveform viewer, and expanded VHDL 2006 ......
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Active-HDL provides an interface to MATLAB (version 6.5) and Simulink (version 5.0) ... Active-HDL 6.2 provides an automated method of generating Simulink ......
Active-HDL offers mixed VHDL, Verilog, SystemC\x99 and EDIF design entry, simulation and debugging from a single, integrated environment. Multiple FPGA ......
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This application note provides a brief discussion to the Active-HDL Sim functional simulator. The discussion includes installing/uninstalling the simulator, ......
A Cosimulation Wizard for Simulink provides system designers with an advanced cosimulation solution for verification of system models developed in Simulink ......
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Active-HDL addresses the demand for such co-simulation with highly efficient ... A Simulink diagram with two HDL blocks and one Active-HDL Co-Sim block ......
Update for Design Flow Manager of Active-HDL 7.2 SP2 7/20/2007 ... Aldec, Inc. announced today the release of Active-HDL 7.3. ......
